The continuing trend of scaling down integrated circuits has forced the semiconductor industry to consider new techniques for fabricating precise components at submicron levels. This is of particular relevance to the manufacture of DRAM devices. Dielectric layers are the foundation to the creation of cell capacitors. The expansion of the memory capacity of a DRAM device is dependent on the ability to fabricate smaller cells having increased capacitances. As such, the thinner a dielectric layer can be manufactured having an equivalent or increased dielectric constant, the smaller the cell.
In metal oxide semiconductor ("MOS") technology, small, high performance transistors require thin gate and cell dielectrics. An ultrathin (.ltoreq.100 .ANG.) dielectric layer should minimally comprise enhanced dielectric properties. However, several additional design considerations must be examined in the manufacture of ultrathin dielectric layers. These include uniformity in thickness, reliability, high dielectric constant, as well as imperviousness to thermal breakdown. Ultimately, high performance, ultrathin dielectric layers should also comprise a low diffusion rate for impurities, low interface state density, and be chemically stable. Nevertheless, the physical constraints of the materials and methods of fabrication employed have made the characteristics of the dielectrics derived less than the optimum.
Silicon dioxide, at thicknesses greater than 100 .ANG., provides a cost effective, high quality dielectric layer for single crystal silicon or polycrystalline silicon ("polysilicon") substrates. Nonetheless, for dielectric layers less than 100 .ANG., silicon dioxide is known to have a high defect density and a low efficacy as a diffusion mask against impurity diffusion.
In light of silicon dioxide's inherent limitations for dielectric layers of 100 .ANG. or less, several alternatives have been developed. One such alternative is the use of silicon nitride (Si.sub.3 N.sub.4) as a dielectric layer. This layer can be formed on a substrate's surface through a process which includes Rapid Thermal Nitridation ("RTN"). Under RTN, the silicon substrate is exposed to either pure ammonia (NH.sub.3) or an ammonia plasma at temperatures approximately between 850.degree. and 1200.degree. C. to form a silicon nitride film.
Precise ultrathin dielectric layers are currently fabricated employing RTN. However, the dielectric layers formed thereby have had several shortcomings. These ultrathin dielectrics have lacked uniformity in their overall composition. Further, they have had questionable reliability in part because of their susceptibility to thermal breakdown. Hence, the overall cell capacitance of the known art is limited.
For example, in U.S. Pat. No. 4,949,154, inventor Haken teaches a method of depositing a thin dielectric over a polysilicon substrate. Applying the technique of Haken, a silicon nitride layer is formed over a silicon dioxide layer, which is positioned over the polysilicon substrate. Subsequently, transistors are formed in the cleared areas of the polysilicon substrate, and a second layer of field oxide is grown. This approach creates O-N-O thin dielectric layers atop the polysilicon substrate. It is this additional oxide layer which reduces the uniformity and reliability of the overall dielectric layer.